With the development of semiconductor technology, three-dimensional (3D) packaging has become more widely used. An integrated circuit employing 3D packaging technology may be called a 3D-IC. In a 3D-IC, chips may be vertically stacked on top of each other, with different chips being interconnected using interconnects such as through-silicon-vias (TSVs), bumps, and/or redistribution layers.
Among different kinds of 3D-ICs, those having logic chips and memory chips stacked in one package may be challenging to manufacture. Since there are many TSVs in such a 3D-IC, a large number of bumps may also be required to connect the TSVs in one chip and wirings on another chip. However, since chip area may be limited, the large number of bumps may require reducing a horizontal size of the bumps, such as a diameter of a circular bump, a side length of a square bump, or a length of a short side of a rectangular bump. The horizontal size of the bumps may need to be reduced to about 10 μm or even smaller. The traditional method of manufacturing lead-free solder bumps by a printing process may not be suitable for manufacturing bumps of such size.
Generally, a 3D-IC packaging process may require low temperature (such as a temperature lower than about 200° C.), low pressure (such as a pressure lower than 10 MPa), and non-vacuum condition during bonding of two chips. Moreover, bumps between the chips may need to have high strength and low resistivity. Currently, there are two categories of bonding methods that may be used for 3D-IC packaging. One is solder bonding, and the other is thermocompression bonding using copper bumps. However, the existing techniques cannot achieve a bump having a horizontal size of about 10 μm or smaller, which may be used to bond two chips at a bonding temperature lower than 200° C. and a bonding pressure smaller than 10 MPa in a non-vacuum environment. For example, use of SnAgCu solder can only achieve a bump having a horizontal size larger than 25 μm. Solder bonding using CuSn solder may be used to manufacture bumps having smaller size, but the temperature required for bonding using CuSn solder may need to be higher than 250° C. The thermocompression bonding method using copper bumps may need a higher temperature of about 400° C., a pressure higher than 10 MPa, and a vacuum environment. Also, a 3D-IC packaged using thermocompression bonding method may have large stresses built up in the chips. This may be especially true for an IC package composed of chips with small thickness and the stresses may cause the chips to crack.
Recently, metal nano particles have been employed as bonding material for microelectromechanical systems (MEMS), surface mount diodes (SMD), and light emitting devices (LED). Due to their small size, metal nano particles may have a low melting temperature, so that the bonding process using metal nano particles may be performed at a low temperature. However, in most existing methods, metal nano particles are coated on chips in a form of paste or ink. These methods may not be able to form micro bumps having a horizontal size smaller than 10 μm, and thus may also not be suitable for the fabrication of a 3D-IC including logic and memory chips.
Further, since space exists between metal nano particles due to, for example, non-uniform nano-particle size and protective agents such as polyvinylpyrrolidone (PVP), if the metal nano particles are directly subjected to a bonding process, voids may appear in the bumps so formed. For micro bumps having a horizontal size smaller than 10 μm, such voids may undesirably decrease bond strength. The resistivity of the micro bumps may also increase due to the voids. To prevent voids from forming, the metal nano particles may be first melted and solidified, and then subjected to the bonding process. However, in this method, since the melting/solidifying process may cause formation of larger crystal grains, the temperature required for bonding may be increased.